Not a question, just wanted to say I'm a big fan of your blog and have been binge-reading it in recent times. I really enjoy the way you explain concepts like transistor types, digital logic and chip design in a way that even somebody like me, who's still pretty new to this low-level look at hardware, can understand. I also appreciate that you sometimes use the same intro or explanations in multiple blog articles, so readers can just pick up whatever they're most interested in and don't have to go through everything that came before.
Ah, I do have a question: Any chance of an article about the Gameboy CPU someday in the future? :)
I'm writing an emulator for it at the moment and find it to be quite an interesting chip from this perspective - such a weird crossover between a 8008 and Z80 (if I remember correctly).
Thanks for the nice comments. The Gameboy CPU sounds like an interesting chip. I'll put the it on my list of processors to look at when I'm done with my current projects. In other words, don't hold your breath :-)
Not a question but a suggestion. You should also do a similar article for the 8061 series processor. This was a special processor used at least in the Ford EEC-IV (Fox body Mustangs, 1990s F-150s, etc), notable for its very wacky "M-BUS" memory bus. They wanted to conserve pins (I guess for more GPIO) so they replaced the normal bus with a bidirectional 8-bit bus, with a couple registers set in the memory chip which represent the data pointer or program counter. At any point the processor can request data from either of those two pointers with a couple dedicated signals STB, IT, and DI, and the program counter pointer is supposed to auto-increment.
The whole thing is a very complex pair of state machines and it'd be interesting to go over the protocol. It's been documented in a difficult-to-read Ford programmers guide, but largely unheard of otherwise.
For the 8086 they had a gate level simulator called LOCIS. The problem is that intel historically designed everything at the transistor level, so the 8086 didn't map onto a gate level simulation very well.
The "Coping with the Complexity of Microprocessor
Design at Intel – A CAD History" paper [1] goes into details of what they used in the 80s and onwards, but it does briefly mention what they were doing before that.
Author here for your 8088 questions...
Not a question, just wanted to say I'm a big fan of your blog and have been binge-reading it in recent times. I really enjoy the way you explain concepts like transistor types, digital logic and chip design in a way that even somebody like me, who's still pretty new to this low-level look at hardware, can understand. I also appreciate that you sometimes use the same intro or explanations in multiple blog articles, so readers can just pick up whatever they're most interested in and don't have to go through everything that came before.
Ah, I do have a question: Any chance of an article about the Gameboy CPU someday in the future? :)
I'm writing an emulator for it at the moment and find it to be quite an interesting chip from this perspective - such a weird crossover between a 8008 and Z80 (if I remember correctly).
Thanks for the nice comments. The Gameboy CPU sounds like an interesting chip. I'll put the it on my list of processors to look at when I'm done with my current projects. In other words, don't hold your breath :-)
Thanks, I'll take what I can get :D
Not a question but a suggestion. You should also do a similar article for the 8061 series processor. This was a special processor used at least in the Ford EEC-IV (Fox body Mustangs, 1990s F-150s, etc), notable for its very wacky "M-BUS" memory bus. They wanted to conserve pins (I guess for more GPIO) so they replaced the normal bus with a bidirectional 8-bit bus, with a couple registers set in the memory chip which represent the data pointer or program counter. At any point the processor can request data from either of those two pointers with a couple dedicated signals STB, IT, and DI, and the program counter pointer is supposed to auto-increment.
The whole thing is a very complex pair of state machines and it'd be interesting to go over the protocol. It's been documented in a difficult-to-read Ford programmers guide, but largely unheard of otherwise.
That seems like an interesting, but obscure processor, maybe a little too obscure, even though it spawned the 8096 (MSC-96) line.
How did they test and debug this stuff in the 70s
For the 8086 they had a gate level simulator called LOCIS. The problem is that intel historically designed everything at the transistor level, so the 8086 didn't map onto a gate level simulation very well.
The "Coping with the Complexity of Microprocessor Design at Intel – A CAD History" paper [1] goes into details of what they used in the 80s and onwards, but it does briefly mention what they were doing before that.
[1] https://www.researchgate.net/profile/Avinoam-Kolodny/publica...
Thanks.