I spent months on this because I got frustrated with "code is law" being a lie.
Every blockchain claims immutability until something goes wrong. Then they fork.
- Ethereum forked after the DAO hack
- Bitcoin forks constantly over ideology
- Smart contracts get "upgraded"
So I asked: what if you literally couldn't change the rules?
Not "we promise not to" — actually physically impossible.
I designed a chip where the transaction split (6.18%) is computed by arithmetic circuits etched into silicon at fabrication. No software layer. No API. No attack surface.
The split:
- 1.00% → Founder
- 3.00% → Liquidity
- 2.18% → Maintenance
- 93.82% → User
To change it, you'd need new photomasks ($millions), new fabrication (months), and replace every chip. That's the point.
Also included:
- SRAM-PUF identity (each chip is physically unique)
- Proof of Innovation (rewards diversity, not mining/wealth)
- Logarithmic governance (anti-whale: 1000× activity = 10× votes)
- 30-day mortality clause (dead wallets revert, unlike Bitcoin's 4M lost coins)
Real performance: ~500M transactions/sec @ 500MHz. No BS trillion-TPS claims.
It's 31 SystemVerilog modules, fully synthesizable. Not fabricated yet (RTL only). No formal verification yet. Performance is estimated.
I'm not selling anything. I want people to review the architecture. Find the flaws. Tell me why it won't work. That's how it gets better.
I spent months on this because I got frustrated with "code is law" being a lie.
Every blockchain claims immutability until something goes wrong. Then they fork. - Ethereum forked after the DAO hack - Bitcoin forks constantly over ideology - Smart contracts get "upgraded"
So I asked: what if you literally couldn't change the rules?
Not "we promise not to" — actually physically impossible.
I designed a chip where the transaction split (6.18%) is computed by arithmetic circuits etched into silicon at fabrication. No software layer. No API. No attack surface.
The split: - 1.00% → Founder - 3.00% → Liquidity - 2.18% → Maintenance - 93.82% → User
To change it, you'd need new photomasks ($millions), new fabrication (months), and replace every chip. That's the point.
Also included: - SRAM-PUF identity (each chip is physically unique) - Proof of Innovation (rewards diversity, not mining/wealth) - Logarithmic governance (anti-whale: 1000× activity = 10× votes) - 30-day mortality clause (dead wallets revert, unlike Bitcoin's 4M lost coins)
Real performance: ~500M transactions/sec @ 500MHz. No BS trillion-TPS claims.
It's 31 SystemVerilog modules, fully synthesizable. Not fabricated yet (RTL only). No formal verification yet. Performance is estimated.
I'm not selling anything. I want people to review the architecture. Find the flaws. Tell me why it won't work. That's how it gets better.
The project is open source and community-driven.
GitHub: https://github.com/YggdrasilDao/Primal-Origins-SoC-IP-Core
Happy to answer questions about the architecture.